Welcome to Verification Land

Welcome to my new blog! This blog will be about all things verification, looking at the industry, the profession, and the technology of verification.  Writing a blog is a new thing for me.  I hope we can embark on this journey together to explore the world of verification.

Verification is fundamentally hard.  You know that. Making a project successful requires hardware skills, software skills, and a certain amount of guile and fortitude. The whole thing can be daunting, but you are not alone. There are many excellent tools and methods available help you with the job.  There are also many that are not so excellent.  There are companies and organizations that want your money and attention and in return promise to ease the verification task (at least a little). The industry has developed a number of standards to guide tool developers and aid users.  All of this together forms a rich landscape, of tools, methods, standards, technologies, companies, publications, and, of course, engineers and managers who have dedicated their careers to the problem of ensuring that electronic designs are functionally correct.

Let's get started by making an attempt to define verification.  Fill in the blank: Verification is ___________.  Here are some possibilities:

• Verification is the process of ensuring an electronic design is functionally correct.
• Verification is building testbenches which automate the process of demonstrating the functional correctness of an electronic design.
• Verification is the nexus of hardware and software.
• Verification is about ensuring that a design does not have to be re-spun in the fab.
• Verification is a means of increasing customer confidence in an electronic product.
• Verification is nothing but expensive insurance.
• Verification is the last line of defense between a designer and the fab.
• Verification is building software to test hardware.
• Verification is the art of making impossible claims about an intractable problem.

How would you fill in the blank?

I was drawn into verification by the breadth and depth of the technical challenges. I studied computer science in school and was interested in a career in software development.  But I wanted to build *interesting* software.  While I was still in school I was fortunate to get a job in what was called at the time a "CAD team" at an aerospace company.  This team was effectively an in-house EDA company.  At a time when there were not many commercially available tools for verification (what we were doing was not even really called verification then) we built most of our own tools. There I was introduced to simulators, exotic programming languages, hardware design, and other cutting edge design and verification technologies.

I was hooked. This was far more interesting than building payroll software. I began by writing models of digital and analog components. After school I moved to a small EDA company and worked on simulator internals and modeling languages.  Since then I have worked at a number
of EDA companies and semiconductor companies.

The scale of the the devices we are verifying today is many orders of magnitude larger than when I was in school.  Of course, the methodologies and tools used to design and verify them have evolved to accommodate the scale.  Even as the industry and many technologies have matured we cannot say verification is a solved problem. Perhaps some parts are evolving faster than others, but things are not stagnant. There are still new problems to be solved and new challenges around every corner.

We'll look at all those things, traversing the verification landscape exploring things of interest and trying to make some sense of all of it. Most importantly, I hope you, the reader, will participate in the discussion.  A good blog is not just a monologue, but a dialog between the blogger and the readers.  I look forward to interacting with you via comments and emails regarding these posts.